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IEEE Exciter Models

These excitation system models implement the IEEE Std 421.5-2016 “IEEE Recommended Practice for Excitation System Models for Power System Stability Studies” (and selected ENTSO-E variants) within RAMSES. Each model is defined using the CODEGEN domain-specific language (DSL) and compiled into Fortran for time-domain simulation. The DSL describes block diagrams as interconnected transfer function primitives (tf1p, tf1p1z, tf1plim, tfder1p, inlim, pictl, etc.), initial conditions, and algebraic constraints — forming a self-contained, portable model definition.


Model NameBase TypePSSOEL / LimiterIEEE Reference
AC1AAC type 1IEEE 421.5 Type AC1A
AC1A_MAXEX2AC type 1MAXEX2 field current limiterIEEE 421.5 Type AC1A
AC1A_OELHQAC type 1OELHQ PID OELIEEE 421.5 Type AC1A
AC1A_RETROAC type 1 (retrofit)PSS4B (internal)
AC1A_RETRO_PSS4BAC type 1 (retrofit)PSS4B
AC4AAC type 4IEEE 421.5 Type AC4A
AC8BAC type 8IEEE 421.5 Type AC8B
AC8B_PSS3B_limAC type 8PSS3BIntegral OEL + SCLIEEE 421.5 Type AC8B
AC8B_limAC type 8Integral OEL + SCLIEEE 421.5 Type AC8B
DC3ADC type 3IEEE 421.5 Type DC3A
ENTSOE_simpENTSO-E simplifiedIEEEST (internal)ENTSO-E
ENTSOE_limENTSO-E simplifiedIEEEST (internal)Integral OELENTSO-E
EXHQSCST type (HQ)Field current db
EXHQSC_MAXEX2ST type (HQ)MAXEX2 + field db
EXHQSC_PSS4BST type (HQ)PSS4BField current db
EXHQSC_PSS4B_MAXEX2ST type (HQ)PSS4BMAXEX2
EXHQSC_PSS4B_OELHQST type (HQ)PSS4BOELHQ PID OEL
EXPIC1AC/ST (PIC type)
EXPIC1_PSS2BAC/ST (PIC type)PSS2B
EXPIC1_PSS2B_MAXEX2AC/ST (PIC type)PSS2BMAXEX2
IEEET5DC type 5IEEE 421.5 Type DC5A (legacy)
SEXSST simplifiedCIGRÉ simplified
SEXS_IEEESTST simplifiedIEEESTCIGRÉ simplified
SEXS_STAB3_limST simplifiedSTAB3Integral OEL
ST1AST type 1IEEE 421.5 Type ST1A
ST1A_IEEESTST type 1IEEESTIEEE 421.5 Type ST1A
ST1A_IEEEST_MAXEX2ST type 1IEEESTMAXEX2IEEE 421.5 Type ST1A
ST1A_PSS2BST type 1PSS2BIEEE 421.5 Type ST1A
ST1A_PSS2B_MAXEX2ST type 1PSS2BMAXEX2IEEE 421.5 Type ST1A
ST1A_PSS2B_OELHQST type 1PSS2BOELHQ PID OELIEEE 421.5 Type ST1A
ST1A_PSS3BST type 1PSS3BIEEE 421.5 Type ST1A
ST1A_PSS3B_OELHQST type 1PSS3BOELHQ PID OELIEEE 421.5 Type ST1A
ST1A_PSS4BST type 1PSS4BIEEE 421.5 Type ST1A
ST1A_PSS4B_MAXEX2ST type 1PSS4BMAXEX2IEEE 421.5 Type ST1A
ST1A_PSS4B_OELHQST type 1PSS4BOELHQ PID OELIEEE 421.5 Type ST1A
ST1A_OELHQST type 1OELHQ PID OELIEEE 421.5 Type ST1A
ST1A_limST type 1Integral OEL + SCLIEEE 421.5 Type ST1A
ST2AST type 2IEEE 421.5 Type ST2A (via EXPIC1)

The AC1A is a rotating AC exciter with a self-excited field winding and non-linear saturation. It corresponds to IEEE Std 421.5-2016 Type AC1A. The generator terminal voltage VtV_t is compensated for line drop and filtered before being compared with the reference. An AC alternator supplies the field through a rectifier whose output depends on the commutation voltage VEV_E and field current IfdI_{fd}.

The voltage regulator processes the error signal through a lead-lag network and a limited amplifier:

ΔV=VREFVcVFΔVPSS\Delta V = V_{REF} - V_c - V_F - \Delta V_{PSS}

V1(s)=ΔV1+sTC1+sTBV_1(s) = \Delta V \cdot \frac{1 + sT_C}{1 + sT_B}

VA(s)=V1KA1+sTA,VAMINVAVAMAXV_A(s) = V_1 \cdot \frac{K_A}{1 + sT_A}, \quad V_{AMIN} \le V_A \le V_{AMAX}

The AC exciter integrator with saturation and demagnetization:

VFE=KDIfd+(KE+SE(VE))VEV_{FE} = K_D \cdot I_{fd} + \left(K_E + S_E(V_E)\right) V_E

V˙E=1TE(VRVFE),0VE\dot{V}_E = \frac{1}{T_E}(V_R - V_{FE}), \quad 0 \le V_E

Efd=VE(1KCIfdVE)E_{fd} = V_E \cdot \left(1 - \frac{K_C \cdot I_{fd}}{V_E}\right)

The derivative feedback (rate feedback) path:

VF(s)=EfdsKF/TF1+sTFV_F(s) = E_{fd} \cdot \frac{sK_F/T_F}{1 + sT_F}

where SE(VE)S_E(V_E) is the saturation function interpolated from the two-point saturation characteristic (VE1,SE1)(V_{E1}, SE_1) and (VE2,SE2)(V_{E2}, SE_2).

  1. Line drop compensation (algeq): Vc1=vcomp(Vt,P,Q,Kv,Rc,Xc)V_{c1} = vcomp(V_t, P, Q, K_v, R_c, X_c)
  2. Voltage measurement filter (tf1p): VcVc1V_c \leftarrow V_{c1} with time constant TRT_R
  3. AVR summation (algeq): ΔV=VREFVcVF\Delta V = V_{REF} - V_c - V_F
  4. Lead-lag compensator (tf1p1z): V1ΔVV_1 \leftarrow \Delta V with (TC,TB)(T_C, T_B)
  5. Amplifier with limits (tf1plim): V2V1V_2 \leftarrow V_1 with gain KAK_A, time constant TAT_A, limits [VAMIN,VAMAX][V_{AMIN}, V_{AMAX}]
  6. UEL high-value gate (max1v1c): V3=max(V2,VUEL)V_3 = \max(V_2, V_{UEL})
  7. OEL low-value gate (min1v1c): V4=min(V3,VOEL)V_4 = \min(V_3, V_{OEL})
  8. Output limiter (lim): VR=clamp(V4,VRMIN,VRMAX)V_R = \text{clamp}(V_4, V_{RMIN}, V_{RMAX})
  9. Exciter integrator (inlim): VE(VRVFE)/TEV_E \leftarrow (V_R - V_{FE})/T_E
  10. Saturation computation (algeq): VFEV_{FE} from KDK_D, KEK_E, SE(VE)S_E(V_E)
  11. Rectifier output (algeq): Efd=vrectif(Ifd,VE,KC)E_{fd} = vrectif(I_{fd}, V_E, K_C)
  12. Derivative feedback (tfder1p): VFVFEV_F \leftarrow V_{FE} with gain KF/TFK_F/T_F, time constant TFT_F
ParameterDescriptionUnit/Type
KvVoltage compensation gainpu
RcResistance for line drop compensationpu
XcReactance for line drop compensationpu
TRVoltage transducer time constants
KAVoltage regulator gainpu
TAVoltage regulator time constants
TBLead-lag denominator time constants
TCLead-lag numerator time constants
VAMAXMaximum regulator outputpu
VAMINMinimum regulator outputpu
KEExciter constant (self-excitation term)pu
TEExciter time constants
KFRate feedback gainpu
TFRate feedback time constants
VRMAXMaximum field voltagepu
VRMINMinimum field voltagepu
VE1Saturation factor voltage point 1pu
SE1Saturation factor at VE1V_{E1}pu
VE2Saturation factor voltage point 2pu
SE2Saturation factor at VE2V_{E2}pu
KCCommutation factor (rectifier regulation)pu
KDDemagnetization factorpu
VUELUEL input signalpu
ModelDescription
AC1ABase model — IEEE Type AC1A
AC1A_MAXEX2Adds MAXEX2 field current limiter; VOEL moves to reference summation point (LV gate removed)
AC1A_OELHQAdds Hydro-Québec PID over-excitation limiter (11-point timer)
AC1A_RETRORetrofit variant with internal PSS4B; uses first-order AVR without separate exciter block
AC1A_RETRO_PSS4BRetrofit variant with external PSS4B speed input
SYNC_MACH g1 g1 1. 1. 0. 0. 800. 760. 3. 0. 0.95
XT 0.15 1.1 0.25 0.2 0.7 * 0.2 0.1 6.0257 0. 5.00 0.05 * 0.1
EXC AC1A 0. 0. 0. 0.02 200.0 0.02 10.0 1.0 7.32 -7.32 1.0 1.0 0.03 1.0 6.03 -5.43 4.18 0.1 3.14 0.033 0.2 0.38 99999
TOR CONSTANT ;

The AC4A is a simplified static representation of an AC exciter system with an inner-loop voltage-dependent output limit. It corresponds to IEEE Std 421.5-2016 Type AC4A. The upper output limit is a function of field current: VRMAX,eff=VRMAXKCIfdV_{RMAX,eff} = V_{RMAX} - K_C \cdot I_{fd}.

ΔV=VREFVc\Delta V = V_{REF} - V_c

VI=clamp(ΔV,VIMIN,VIMAX)V_I = \text{clamp}(\Delta V, V_{IMIN}, V_{IMAX})

V1(s)=VI1+sTC1+sTBV_1(s) = V_I \cdot \frac{1 + sT_C}{1 + sT_B}

Efd(s)=V1KA1+sTA,VRMINEfdVRMAXKCIfdE_{fd}(s) = V_1 \cdot \frac{K_A}{1 + sT_A}, \quad V_{RMIN} \le E_{fd} \le V_{RMAX} - K_C \cdot I_{fd}

The variable upper limit is updated algebraically at each time step, making AC4A a time-varying limited integrator system.

  1. Line drop compensation (algeq): Vc1V_{c1} from terminal measurements
  2. Voltage measurement filter (tf1p): VcV_c with TRT_R
  3. AVR summation (algeq): ΔV=VREFVc\Delta V = V_{REF} - V_c
  4. Input limiter (lim): VI=clamp(ΔV,VIMIN,VIMAX)V_I = \text{clamp}(\Delta V, V_{IMIN}, V_{IMAX})
  5. Lead-lag (tf1p1z): V1VIV_1 \leftarrow V_I with (TC,TB)(T_C, T_B)
  6. UEL high-value gate (max1v1c): V2=max(V1,VUEL)V_2 = \max(V_1, V_{UEL})
  7. Variable upper limit (algeq): uplim=VRMAXKCIfduplim = V_{RMAX} - K_C \cdot I_{fd}
  8. Variable-limit amplifier (tf1pvlim): EfdV2E_{fd} \leftarrow V_2 with KAK_A, TAT_A, limits [VRMIN,uplim][V_{RMIN}, uplim]
ParameterDescriptionUnit/Type
KvVoltage compensation gainpu
RcLine drop compensation resistancepu
XcLine drop compensation reactancepu
TRMeasurement filter time constants
VIMAXMaximum input error signalpu
VIMINMinimum input error signalpu
TCLead numerator time constants
TBLag denominator time constants
VUELUEL signal valuepu
KARegulator gainpu
TARegulator time constants
VRMAXMaximum output (at zero field current)pu
VRMINMinimum outputpu
KCField current derating factorpu
ModelDescription
AC4ABase model — IEEE Type AC4A, no PSS or OEL
SYNC_MACH g1 g1 1. 1. 0. 0. 800. 760. 3. 0. 0.95
XT 0.15 1.1 0.25 0.2 0.7 * 0.2 0.1 6.0257 0. 5.00 0.05 * 0.1
EXC AC4A 0. 0. 0. 0.02 8.0 -8.0 1.0 10.0 0.0 200.0 0.015 4.44 -4.44 0.0
TOR CONSTANT ;

The AC8B is a rotating AC exciter with a PID voltage regulator (rather than the proportional-integral amplifier of earlier types). It corresponds to IEEE Std 421.5-2016 Type AC8B. The PID structure — proportional gain KPRK_{PR}, integral gain KIRK_{IR}, and derivative gain KDRK_{DR} — provides improved transient response compared to Type AC1A.

The PID voltage regulator:

ΔV=VcVREF\Delta V = V_c - V_{REF}

VPID(s)=KPRΔV+KIRsΔV+sKDR/TDR1+sTDRΔVV_{PID}(s) = K_{PR} \cdot \Delta V + \frac{K_{IR}}{s} \cdot \Delta V + \frac{sK_{DR}/T_{DR}}{1 + sT_{DR}} \cdot \Delta V

VR(s)=VPIDKA1+sTA,VRMINVRVRMAXV_R(s) = V_{PID} \cdot \frac{K_A}{1 + sT_A}, \quad V_{RMIN} \le V_R \le V_{RMAX}

The AC exciter with variable limits based on maximum field excitation voltage VFEMAXV_{FEMAX}:

VFE=KDIfd+(KE+SE(VE))VEV_{FE} = K_D \cdot I_{fd} + \left(K_E + S_E(V_E)\right) V_E

V˙E=1TE(VRVFE),VEMINVEVFEMAXKDIfdKE+SE(VE)\dot{V}_E = \frac{1}{T_E}(V_R - V_{FE}), \quad V_{EMIN} \le V_E \le \frac{V_{FEMAX} - K_D I_{fd}}{K_E + S_E(V_E)}

  1. Voltage measurement (tf1p): VcV_c with TRT_R
  2. Error signal (algeq): ΔV=VcVREF\Delta V = V_c - V_{REF}
  3. PID derivative part (tfder1p): xderΔVx_{der} \leftarrow \Delta V with gain KDR/TDRK_{DR}/T_{DR}
  4. PID proportional-integral (pictl): xpropintΔVx_{propint} \leftarrow \Delta V with KIRK_{IR}, KPRK_{PR}
  5. PID sum (algeq): xpid=xpropint+xderx_{pid} = x_{propint} + x_{der}, limited to [VPIDMIN,VPIDMAX][V_{PIDMIN}, V_{PIDMAX}]
  6. Amplifier (tf1plim): VRxpidV_R \leftarrow x_{pid} with KAK_A, TAT_A
  7. Exciter integrator (invlim): VEV_E with variable limits from VFEMAXV_{FEMAX}
  8. Saturation and rectification (algeq): VFEV_{FE}, EfdE_{fd}
ParameterDescriptionUnit/Type
KvVoltage compensation gainpu
RcLine drop resistancepu
XcLine drop reactancepu
TRMeasurement time constants
KPRPID proportional gainpu
KIRPID integral gainpu/s
KDRPID derivative gainpu·s
TDRPID derivative filter time constants
VPIDMAXPID output upper limitpu
VPIDMINPID output lower limitpu
KAAmplifier gainpu
TAAmplifier time constants
VRMAXMaximum regulator outputpu
VRMINMinimum regulator outputpu
KCRectifier commutation factorpu
KDDemagnetization factorpu
KEExciter self-excitation constantpu
TEExciter time constants
VFEMAXMaximum field excitation voltagepu
VEMINMinimum exciter outputpu
VE1Saturation voltage point 1pu
SE1Saturation factor at VE1V_{E1}pu
VE2Saturation voltage point 2pu
SE2Saturation factor at VE2V_{E2}pu
ModelDescription
AC8BBase model — IEEE Type AC8B
AC8B_PSS3B_limAdds PSS3B dual-input stabilizer and integral OEL + SCL (stator current limiter)
AC8B_limAdds integral OEL and SCL without PSS
SYNC_MACH g1 g1 1. 1. 0. 0. 800. 760. 3. 0. 0.95
XT 0.15 1.1 0.25 0.2 0.7 * 0.2 0.1 6.0257 0. 5.00 0.05 * 0.1
EXC AC8B 0. 0. 0. 0.02 1.0 5.0 0.1 0.1 8.0 -8.0 1.0 0.1 6.5 -6.5 0.2 1.0 1.0 0.5 6.5 0.0 4.0 0.3 3.0 0.33
TOR CONSTANT ;

The DC3A represents a non-continuously acting (rheostat-type) DC excitation system. It corresponds to IEEE Std 421.5-2016 Type DC3A. Rather than a proportional amplifier, it uses a three-position switch (VRMIN / VRH / VRMAX) driven by an integrator that holds the rheostat position VRHV_{RH}. The switch position is determined by whether the error signal VERRV_{ERR} falls inside or outside a deadband ±KV\pm K_V.

VERR=VREFVcV_{ERR} = V_{REF} - V_c

The rheostat integrator:

V˙RH=KVTRHVRMAXVRMINclamp(VERR,KV,KV),VRMINVRHVRMAX\dot{V}_{RH} = \frac{K_V \cdot T_{RH}}{V_{RMAX} - V_{RMIN}} \cdot \text{clamp}(V_{ERR}, -K_V, K_V), \quad V_{RMIN} \le V_{RH} \le V_{RMAX}

The three-position switch:

VR={VRMINVERR<KVVRHVERRKVVRMAXVERR>KVV_R = \begin{cases} V_{RMIN} & V_{ERR} < -K_V \\ V_{RH} & |V_{ERR}| \le K_V \\ V_{RMAX} & V_{ERR} > K_V \end{cases}

The DC exciter with saturation:

E˙fd=1TE[VR(KE+SE(Efd))Efd]\dot{E}_{fd} = \frac{1}{T_E}\left[V_R - \left(K_E + S_E(E_{fd})\right) E_{fd}\right]

ParameterDescriptionUnit/Type
KvcompVoltage compensation gainpu
RcLine drop resistancepu
XcLine drop reactancepu
TRMeasurement time constants
TRHRheostat traversal times
KVSensitivity of non-continuously acting controllerpu
VRMAXMaximum field voltagepu
VRMINMinimum field voltagepu
TEExciter time constants
KEExciter self-excitation constantpu
E1Saturation voltage point 1pu
SE1Saturation factor at E1E_1pu
E2Saturation voltage point 2pu
SE2Saturation factor at E2E_2pu
ModelDescription
DC3ABase model — IEEE Type DC3A, non-continuously acting rheostat controller
SYNC_MACH g1 g1 1. 1. 0. 0. 800. 760. 3. 0. 0.95
XT 0.15 1.1 0.25 0.2 0.7 * 0.2 0.1 6.0257 0. 5.00 0.05 * 0.1
EXC DC3A 0. 0. 0. 0.0 1.0 1.0 1.0 -1.0 0.8 1.0 3.1 0.33 2.3 0.1
TOR CONSTANT ;

The ST1A is a static (thyristor) excitation system with two cascaded lead-lag networks in the voltage regulator path and an inner field current limiter (KLR/ILR). It corresponds to IEEE Std 421.5-2016 Type ST1A. The output limits are proportional to terminal voltage VtV_t, and field current derating applies through KCK_C: uplim=VtVRMAXKCIfduplim = V_t \cdot V_{RMAX} - K_C \cdot I_{fd}.

The voltage regulator with dual lead-lag and instantaneous field current limiting:

ΔV=VREFVc+VPSS+VUEL,path+VF\Delta V = V_{REF} - V_c + V_{PSS} + V_{UEL,path} + V_F

V1=clamp(ΔV,VIMIN,VIMAX)V_1 = \text{clamp}(\Delta V, V_{IMIN}, V_{IMAX})

V2(s)=V11+sTC1+sTBV_2(s) = V_1 \cdot \frac{1 + sT_C}{1 + sT_B}

V3(s)=V21+sTC11+sTB1V_3(s) = V_2 \cdot \frac{1 + sT_{C1}}{1 + sT_{B1}}

VA(s)=V3KA1+sTA,VAMINVAVAMAXV_A(s) = V_3 \cdot \frac{K_A}{1 + sT_A}, \quad V_{AMIN} \le V_A \le V_{AMAX}

Instantaneous field current limiter:

VLR=KLR(IfdILR)V_{LR} = K_{LR}(I_{fd} - I_{LR})

V5=VAmax(VLR,0)V_5 = V_A - \max(V_{LR}, 0)

Final output with terminal-voltage-dependent limits:

Efd=clamp(V5,VtVRMIN,VtVRMAXKCIfd)E_{fd} = \text{clamp}(V_5, V_t \cdot V_{RMIN}, V_t \cdot V_{RMAX} - K_C \cdot I_{fd})

Derivative feedback:

VF(s)=EfdsKF/TF1+sTFV_F(s) = E_{fd} \cdot \frac{sK_F/T_F}{1 + sT_F}

  1. Line drop (algeq): Vc1V_{c1}
  2. Measurement filter (tf1p): VcV_c with TRT_R
  3. AVR summation (algeq): ΔV\Delta V, including UEL (mode 1), PSS, and VF
  4. Error limiter (lim): V1[VIMIN,VIMAX]V_1 \in [V_{IMIN}, V_{IMAX}]
  5. UEL gate (mode 2) (max1v1c): HV gate V2V_2
  6. First lead-lag (tf1p1z): V3V_3 with (TC,TB)(T_C, T_B)
  7. Second lead-lag (tf1p1z): V4V_4 with (TC1,TB1)(T_{C1}, T_{B1})
  8. Amplifier (tf1plim): VAV_A with KAK_A, TAT_A, [VAMIN,VAMAX][V_{AMIN}, V_{AMAX}]
  9. Field current limiter (algeq, lim): VLRV_{LR}, VLRlimV_{LRlim}
  10. Limiter subtraction (algeq): V5=VAVLRlimV_5 = V_A - V_{LRlim}
  11. UEL gate (mode 3) (max1v1c): V6V_6
  12. OEL gate (min2v): V7=min(V6,VOEL)V_7 = \min(V_6, V_{OEL})
  13. Variable-limit output (limvb): EfdE_{fd} with terminal-voltage-scaled limits
  14. Derivative feedback (tfder1p): VFV_F
ParameterDescriptionUnit/Type
KvVoltage compensation gainpu
RcLine drop resistancepu
XcLine drop reactancepu
TRMeasurement filter time constants
UELUEL connection mode (1=summation, 2=HV gate after V1, 3=HV gate after VA)integer
VIMINInput error lower limitpu
VIMAXInput error upper limitpu
VUELUEL signal valuepu
TCFirst lead-lag numerators
TBFirst lead-lag denominators
TC1Second lead-lag numerators
TB1Second lead-lag denominators
KARegulator gainpu
TARegulator time constants
VAMINRegulator lower limitpu
VAMAXRegulator upper limitpu
VRMINOutput lower limit scaling factorpu
VRMAXOutput upper limit scaling factorpu
KCField current derating factorpu
KFRate feedback gainpu
TFRate feedback time constants
KLRField current limiter gainpu
ILRField current limiter referencepu
ModelDescription
ST1ABase model — IEEE Type ST1A
ST1A_IEEESTAdds IEEEST single-input PSS (speed or power input, selectable)
ST1A_IEEEST_MAXEX2Adds IEEEST PSS + MAXEX2 field current limiter
ST1A_PSS2BAdds PSS2B dual-input stabilizer
ST1A_PSS2B_MAXEX2Adds PSS2B + MAXEX2
ST1A_PSS2B_OELHQAdds PSS2B + Hydro-Québec PID OEL
ST1A_PSS3BAdds PSS3B two-channel second-order filter stabilizer
ST1A_PSS3B_OELHQAdds PSS3B + OELHQ
ST1A_PSS4BAdds PSS4B three-band stabilizer
ST1A_PSS4B_MAXEX2Adds PSS4B + MAXEX2
ST1A_PSS4B_OELHQAdds PSS4B + OELHQ
ST1A_OELHQAdds OELHQ PID OEL without PSS
ST1A_limIntegral OEL + stator current limiter (SCL), simplified structure without Kv/Rc/Xc
SYNC_MACH g1 g1 1. 1. 0. 0. 800. 760. 3. 0. 0.95
XT 0.15 1.1 0.25 0.2 0.7 * 0.2 0.1 6.0257 0. 5.00 0.05 * 0.1
EXC ST1A 0. 0. 0. 0.02 1 -0.87 0.87 0.0 1.0 10.0 0.0 1.0 200.0 0.001 7.8 -6.7 0.038 0.0 999.0 0.0 99.0 0.0 0.0
TOR CONSTANT ;

The EXPIC1 model implements a static exciter with an AC rotating bus-fed rectifier and an integrating (PI-type) amplifier path: KA(1+sTA)/sK_A(1 + sT_A)/s. The output VBV_B is proportional to the AC voltage phasor magnitude, creating a bus-fed topology analogous to IEEE Type ST2A. When KP=KI=0K_P = K_I = 0, the rectifier gain is unity.

The AC exciter voltage and rectifier:

VE=KPVt+jKIVt,VB=VE(1KCIfdVE)+V_E = |K_P V_t + jK_I V_t|, \quad V_B = V_E \cdot \left(1 - \frac{K_C I_{fd}}{V_E}\right)^+

The integrating amplifier:

Gamp(s)=KA1+sTAsG_{amp}(s) = K_A \cdot \frac{1 + sT_A}{s}

The field voltage integrator:

E˙fd=1TE[VRVBKEEfd],EFDMINEfdEFDMAX\dot{E}_{fd} = \frac{1}{T_E}\left[V_R \cdot V_B - K_E \cdot E_{fd}\right], \quad E_{FDMIN} \le E_{fd} \le E_{FDMAX}

  1. Voltage measurement (tf1p): VcV_c with TRT_R
  2. Summation (algeq): ΔV=VREFVcVFΔVPSS\Delta V = V_{REF} - V_c - V_F - \Delta V_{PSS}
  3. UEL gate (max1v1c): clamped to VUELV_{UEL}
  4. PI amplifier (pictl): VAV_A with Kgain=KATAK_{gain} = K_A \cdot T_A and KAK_A
  5. Output limiter (lim): VR[VRMIN,VRMAX]V_R \in [V_{RMIN}, V_{RMAX}]
  6. Rectifier voltage (algeq): VEV_E, VBV_B
  7. Field integrator (inlim): EfdE_{fd} from VRVBKEEfdV_R \cdot V_B - K_E \cdot E_{fd}
  8. Derivative feedback (tfder1p): VFV_F
ParameterDescriptionUnit/Type
KvcompVoltage compensation gainpu
RcLine drop resistancepu
XcLine drop reactancepu
TRMeasurement time constants
VUELUEL signalpu
KAAmplifier gainpu
TAAmplifier time constants
VRMAXMaximum regulator outputpu
VRMINMinimum regulator outputpu
KFRate feedback gainpu
TFRate feedback time constants
KEExciter self-excitation constantpu
EFDMAXMaximum field voltagepu
EFDMINMinimum field voltagepu
TEField integrator time constants
KPAC source voltage proportional factorpu
KIAC source voltage quadrature factorpu
KCCommutation voltage drop factorpu
ModelDescription
EXPIC1Base bus-fed static exciter
EXPIC1_PSS2BAdds PSS2B dual-input stabilizer
EXPIC1_PSS2B_MAXEX2Adds PSS2B + MAXEX2 field current limiter
SYNC_MACH g1 g1 1. 1. 0. 0. 800. 760. 3. 0. 0.95
XT 0.15 1.1 0.25 0.2 0.7 * 0.2 0.1 6.0257 0. 5.00 0.05 * 0.1
EXC EXPIC1 0. 0. 0. 0.02 0.0 200.0 0.02 99.0 -99.0 0.0 1.0 1.0 8.0 -8.0 0.5 0.0 1.0 0.0
TOR CONSTANT ;

The IEEET5 (also referenced as DC5A in some conventions) is a non-continuously acting exciter similar to DC3A but uses an inner limiter block lim_civ that gates the integrator holding signal within a deadband ±KV\pm K_V. This creates the three-state (hold/raise/lower) behavior of rheostatic controllers.

VERR=VREFVcV_{ERR} = V_{REF} - V_c

The integrator for rheostat position:

V˙RH=1TRHVERR,VRMINVRHVRMAX\dot{V}_{RH} = \frac{1}{T_{RH}} \cdot V_{ERR}, \quad V_{RMIN} \le V_{RH} \le V_{RMAX}

The lim_civ block implements the deadband gating so that integration is active only when VERR>KV|V_{ERR}| > K_V:

VR={VRMINVERR<KVVRHVERRKVVRMAXVERR>KVV_R = \begin{cases} V_{RMIN} & V_{ERR} < -K_V \\ V_{RH} & |V_{ERR}| \le K_V \\ V_{RMAX} & V_{ERR} > K_V \end{cases}

E˙fd=1TE[VR(KE+SE(Efd))Efd]\dot{E}_{fd} = \frac{1}{T_E}\left[V_R - \left(K_E + S_E(E_{fd})\right) E_{fd}\right]

ParameterDescriptionUnit/Type
KvcompVoltage compensation gainpu
RcLine drop resistancepu
XcLine drop reactancepu
TRHRheostat times
KVController sensitivity deadbandpu
VRMAXMaximum field voltagepu
VRMINMinimum field voltagepu
TEExciter integrator time constants
KEExciter self-excitation constantpu
E1Saturation point 1pu
SE1Saturation factor at E1E_1pu
E2Saturation point 2pu
SE2Saturation factor at E2E_2pu
ModelDescription
IEEET5Base model — non-continuously acting DC exciter

The SEXS (Simplified Excitation System) is a minimal two-parameter static exciter model from CIGRÉ publications, widely used for cases where detailed exciter data is unavailable. It has no measurement filter, no line drop compensation, and no rate feedback — just a lead-lag network and a limited first-order block.

ΔVAVR=VtVo+VPSS\Delta V_{AVR} = V_t - V_o + V_{PSS}

Glag(s)=1+sTA1+sTBG_{lag}(s) = \frac{1 + sT_A}{1 + sT_B}

Efd(s)=Glag(ΔVAVR)KE1+sTE,EMINEfdEMAXE_{fd}(s) = G_{lag}(\Delta V_{AVR}) \cdot \frac{K_E}{1 + sT_E}, \quad E_{MIN} \le E_{fd} \le E_{MAX}

where Vo=Vt+Efd,0/KEV_o = V_t + E_{fd,0}/K_E is computed from initial conditions to achieve zero initial error.

ParameterDescriptionUnit/Type
TALead-lag numerator time constants
TBLead-lag denominator time constants
KEExciter gainpu
TEExciter time constants
EMINMinimum field voltagepu
EMAXMaximum field voltagepu
ModelDescription
SEXSBase simplified exciter
SEXS_IEEESTAdds IEEEST PSS (multi-mode: speed, power, or accelerating power input)
SEXS_STAB3_limAdds STAB3 PSS + integral OEL
SYNC_MACH g1 g1 1. 1. 0. 0. 800. 760. 3. 0. 0.95
XT 0.15 1.1 0.25 0.2 0.7 * 0.2 0.1 6.0257 0. 5.00 0.05 * 0.1
EXC SEXS 0.1 10.0 25.0 0.5 -5.0 5.0
TOR CONSTANT ;

The EXHQSC is a Hydro-Québec static exciter model based on the ST1A topology but extended with an internal field current deadband controller (db block). This controller measures the filtered field current IffI_{ff} through a first-order filter with time constant TIT_I, compares it against asymmetric limits [IFMIN,IFMAX][I_{FMIN}, I_{FMAX}], and feeds back a corrective signal VlrV_{lr} through a first-order lag, contributing to the amplifier output before the variable-limit clamp.

The main AVR path follows ST1A topology with two cascaded first-order blocks (instead of lead-lag):

V2(s)=ΔVKA1+sTAV_2(s) = \Delta V \cdot \frac{K_A}{1 + sT_A}

V4(s)=V21+sTA11+sTA2V_4(s) = V_2 \cdot \frac{1 + sT_{A1}}{1 + sT_{A2}}

The field current limiter deadband:

Iff(s)=Ifd11+sTII_{ff}(s) = I_{fd} \cdot \frac{1}{1 + sT_I}

Ifdb=db(Iff;IFMIN,KMIN,IFMAX,KMAX)I_{fdb} = db(I_{ff}; I_{FMIN}, K_{MIN}, I_{FMAX}, K_{MAX})

Vlr(s)=Ifdb11+sTAV_{lr}(s) = I_{fdb} \cdot \frac{1}{1 + sT_A}

Efd=limvb(V4+KAVlr;Vvmin,Vvmax)E_{fd} = \text{limvb}(V_4 + K_A \cdot V_{lr}; V_{vmin}, V_{vmax})

where Vvmin=VtVRMINKCIfdV_{vmin} = V_t \cdot V_{RMIN} - K_C I_{fd} and Vvmax=VtVRMAXKCIfdV_{vmax} = V_t \cdot V_{RMAX} - K_C I_{fd}.

ParameterDescriptionUnit/Type
KvVoltage compensation gainpu
RcLine drop resistancepu
XcLine drop reactancepu
UELUEL connection flaginteger
VUELUEL signalpu
TRMeasurement time constants
VMINInput error lower limitpu
VMAXInput error upper limitpu
TA1Second filter numerators
TA2Second filter denominators
KARegulator gainpu
TARegulator time constants
VRMINOutput lower limit factorpu
VRMAXOutput upper limit factorpu
KCField current derating factorpu
KFDerivative feedback gainpu
TFDerivative feedback time constants
TIField current filter time constants
IFMINLower deadband thresholdpu
IFMAXUpper deadband thresholdpu
KMINLower deadband gainpu
KMAXUpper deadband gainpu
ModelDescription
EXHQSCBase Hydro-Québec static exciter with field current deadband
EXHQSC_MAXEX2Adds MAXEX2 field current limiter
EXHQSC_PSS4BAdds PSS4B three-band stabilizer
EXHQSC_PSS4B_MAXEX2Adds PSS4B + MAXEX2
EXHQSC_PSS4B_OELHQAdds PSS4B + OELHQ PID OEL

The ENTSO-E simplified exciter combines a built-in speed-signal PSS with a simple lead-lag AVR and first-order exciter block. It is the standard ENTSO-E model for dynamic studies where detailed exciter data is unavailable.

The PSS (speed input ω1\omega - 1) uses two washout stages and two lead-lag stages:

VPSS(s)=(ω1)sTW11+sTW1sTW21+sTW2KS11+sT11+sT21+sT31+sT4V_{PSS}(s) = (\omega - 1) \cdot \frac{sT_{W1}}{1+sT_{W1}} \cdot \frac{sT_{W2}}{1+sT_{W2}} \cdot K_{S1} \cdot \frac{1+sT_1}{1+sT_2} \cdot \frac{1+sT_3}{1+sT_4}

The AVR:

ΔVAVR=VtVo+VPSS\Delta V_{AVR} = V_t - V_o + V_{PSS}

Glag(s)=1+sTA1+sTBG_{lag}(s) = \frac{1 + sT_A}{1 + sT_B}

Efd(s)=Glag(ΔVAVR)KE1+sTE,EMINEfdEMAXE_{fd}(s) = G_{lag}(\Delta V_{AVR}) \cdot \frac{K_E}{1 + sT_E}, \quad E_{MIN} \le E_{fd} \le E_{MAX}

ParameterDescriptionUnit/Type
TW1First washout time constants
TW2Second washout time constants
KS1PSS gainpu
T1First lead-lag numerators
T2First lead-lag denominators
T3Second lead-lag numerators
T4Second lead-lag denominators
VSTMINPSS output lower limitpu
VSTMAXPSS output upper limitpu
TAAVR lead-lag numerators
TBAVR lead-lag denominators
KEExciter gainpu
TEExciter time constants
EMINMinimum field voltagepu
EMAXMaximum field voltagepu
ModelDescription
ENTSOE_simpBase ENTSO-E simplified model with integrated PSS
ENTSOE_limAdds integral OEL (same structure as AC8B_lim OEL)
SYNC_MACH g1 g1 1. 1. 0. 0. 800. 760. 3. 0. 0.95
XT 0.15 1.1 0.25 0.2 0.7 * 0.2 0.1 6.0257 0. 5.00 0.05 * 0.1
EXC ENTSOE_simp 10.0 3.0 10.0 0.2 0.1 0.1 0.1 -0.05 0.05 0.05 0.1 25.0 1.0 -10.0 10.0
TOR CONSTANT ;

Power System Stabilizers (PSS) inject an additional signal VPSSV_{PSS} at the AVR summation point to damp electromechanical oscillations. All variants listed in the model index table include one of the PSS types described here.

PSS2B accepts two input signals (typically speed ω\omega and electrical power PeP_e) and processes them through independent washout chains before combining. It corresponds to IEEE Std 421.5-2016 Type PSS2B.

VS1=clamp(VSI1,VS1MIN,VS1MAX)V_{S1} = \text{clamp}(VSI_1, V_{S1MIN}, V_{S1MAX})

Channel 1 (input 1 washout):

VS1sTW1/(1+sTW1)sTW2/(1+sTW2)1/(1+sT6)pss3V_{S1} \xrightarrow{sT_{W1}/(1+sT_{W1})} \xrightarrow{sT_{W2}/(1+sT_{W2})} \xrightarrow{1/(1+sT_6)} pss_{3}

Channel 2 (input 2 washout):

VS2sTW3/(1+sTW3)sTW4/(1+sTW4)KS2/(1+sT7)pss6V_{S2} \xrightarrow{sT_{W3}/(1+sT_{W3})} \xrightarrow{sT_{W4}/(1+sT_{W4})} \xrightarrow{K_{S2}/(1+sT_7)} pss_{6}

Combination and lead-lag chain (variant M=5, N=1 implemented):

pss7=pss3KS3pss6pss_7 = pss_3 - K_{S3} \cdot pss_6

pss7(1+sT8)/(1+sT9)1/(1+sT9)4pss12pss_7 \xrightarrow{(1+sT_8)/(1+sT_9)} \xrightarrow{1/(1+sT_9)^4} pss_{12}

pss13=pss12+pss6pss_{13} = pss_{12} + pss_6

pss13KS1(1+sT1)/(1+sT2)(1+sT3)/(1+sT4)(1+sT10)/(1+sT11)VPSSpss_{13} \xrightarrow{K_{S1}(1+sT_1)/(1+sT_2)} \xrightarrow{(1+sT_3)/(1+sT_4)} \xrightarrow{(1+sT_{10})/(1+sT_{11})} V_{PSS}

VPSS=clamp(VPSS,unlim,VSTMIN,VSTMAX)V_{PSS} = \text{clamp}(V_{PSS,unlim}, V_{STMIN}, V_{STMAX})

PSS2B Parameters (additional to base exciter):

ParameterDescription
speedinputInput selection (1=speed+power, 2=power+speed)
TW1, TW2Channel 1 washout time constants
T6Channel 1 filter
TW3, TW4Channel 2 washout time constants
T7, KS2Channel 2 filter gain and time constant
KS3Channel coupling gain
T8, T9Ramp-tracking filter
KS1Overall PSS gain
T1T4, T10, T11Lead-lag time constants
VS1MIN, VS1MAXInput 1 limits
VS2MIN, VS2MAXInput 2 limits
VSTMIN, VSTMAXOutput limits

PSS3B — Two-Input Second-Order Filter Stabilizer

Section titled “PSS3B — Two-Input Second-Order Filter Stabilizer”

PSS3B processes two input channels through measurement filters and washout stages, then combines them and applies two cascaded second-order lead-lag filters. It corresponds to IEEE Std 421.5-2016 Type PSS3B.

VSI11/(1+sT1)KS1sTW1/(1+sTW1)pss2V_{SI1} \xrightarrow{1/(1+sT_1)} \xrightarrow{K_{S1} sT_{W1}/(1+sT_{W1})} pss_2

VSI21/(1+sT2)KS2sTW2/(1+sTW2)pss4V_{SI2} \xrightarrow{1/(1+sT_2)} \xrightarrow{K_{S2} sT_{W2}/(1+sT_{W2})} pss_4

pss5=pss2pss4pss_5 = pss_2 - pss_4

pss5KSsTW3/(sTW4+1)pss6pss_5 \xrightarrow{K_S sT_{W3}/(sT_{W4}+1)} pss_6

pss6TF1: A2+sA1+s2/A4A4+sA3+s2/A4TF2: A6+sA5+s2/A8A8+sA7+s2/A8VPSSpss_6 \xrightarrow{\text{TF1: } \frac{A_2 + sA_1 + s^2/A_4}{A_4 + sA_3 + s^2/A_4}} \xrightarrow{\text{TF2: } \frac{A_6+sA_5+s^2/A_8}{A_8+sA_7+s^2/A_8}} V_{PSS}

VPSS=clamp(VPSS,unlim,VSTMIN,VSTMAX)V_{PSS} = \text{clamp}(V_{PSS,unlim}, V_{STMIN}, V_{STMAX})

PSS3B Parameters (additional):

ParameterDescription
speedinputInput mode selection
T1, KS1, TW1Channel 1 filter, gain, washout
T2, KS2, TW2Channel 2 filter, gain, washout
KS, TW3, TW4Combined washout gain and time constants
A1A8Second-order filter coefficients
VSTMIN, VSTMAXOutput limits

PSS4B — Three-Band Multi-Input Stabilizer

Section titled “PSS4B — Three-Band Multi-Input Stabilizer”

PSS4B is a three-band stabilizer that separates the speed deviation signal into low-, intermediate-, and high-frequency components. Each band uses a pair of lead-lag filters. This model corresponds to IEEE Std 421.5-2016 Type PSS4B.

The speed signal Δω=ω1\Delta\omega = \omega - 1 passes through a digital transducer (tf2p2z) to obtain the low/intermediate input. Electrical power PeP_e passes through two washouts and a low-pass filter to derive the high-frequency component ΔωH\Delta\omega_H.

Low-frequency band (ΔωLI\Delta\omega_{L-I} input):

pss4=ΔωLIKL1(KL11+sTL1)1+sTL2pss_4 = \Delta\omega_{L-I} \cdot \frac{K_{L1}(K_{L11} + sT_{L1})}{1 + sT_{L2}}

pss5=ΔωLIKL2(KL17+sTL7)1+sTL8pss_5 = \Delta\omega_{L-I} \cdot \frac{K_{L2}(K_{L17} + sT_{L7})}{1 + sT_{L8}}

VPSSL=clamp ⁣(KL(pss4pss5),VLMin,VLMax)V_{PSSL} = \text{clamp}\!\left(K_L(pss_4 - pss_5),\, V_{LMin}, V_{LMax}\right)

Intermediate-frequency band (same ΔωLI\Delta\omega_{L-I} input):

VPSSI=clamp ⁣(KI(pss7pss8),VIMin,VIMax)V_{PSSI} = \text{clamp}\!\left(K_I(pss_7 - pss_8),\, V_{IMin}, V_{IMax}\right)

High-frequency band (ΔωH\Delta\omega_H input):

VPSSH=clamp ⁣(KH(pss10pss11),VHMin,VHMax)V_{PSSH} = \text{clamp}\!\left(K_H(pss_{10} - pss_{11}),\, V_{HMin}, V_{HMax}\right)

VPSS=clamp(VPSSL+VPSSI+VPSSH,VSTMin,VSTMax)V_{PSS} = \text{clamp}(V_{PSSL} + V_{PSSI} + V_{PSSH},\, V_{STMin}, V_{STMax})

PSS4B Parameters (additional):

ParameterDescription
HGenerator inertia constant (for high-freq path)
KL1, KL11, TL1, TL2Low-band filter 1
KL2, KL17, TL7, TL8Low-band filter 2
KL, VLMax, VLMinLow-band gain and limits
KI1, KI11, TI1, TI2Intermediate-band filter 1
KI2, KI17, TI7, TI8Intermediate-band filter 2
KI, VIMax, VIMinIntermediate-band gain and limits
KH1, KH11, TH1, TH2High-band filter 1
KH2, KH17, TH7, TH8High-band filter 2
KH, VHMax, VHMinHigh-band gain and limits
VSTMax, VSTMinTotal output limits

The IEEEST is a general-purpose single-input PSS with selectable input signal (speed deviation, electrical power, or computed accelerating power). It corresponds to IEEE Std 421.5-2016 Type PSS1A. Two second-order lead-lag filters provide frequency shaping before two first-order lead-lags and a washout stage.

VS11A2+sA1+s2/(A1A2)A6+sA5+s2/(A3A4)A4+sA3+s2/(A3A4)VS3VS_1 \xrightarrow{\frac{1}{A_2 + sA_1 + s^2/(A_1 A_2)}} \xrightarrow{\frac{A_6 + sA_5 + s^2/(A_3 A_4)}{A_4 + sA_3 + s^2/(A_3 A_4)}} VS_3

VS31+sT11+sT21+sT31+sT4KSsT5/T61+sT6VPSSVS_3 \xrightarrow{\frac{1+sT_1}{1+sT_2}} \xrightarrow{\frac{1+sT_3}{1+sT_4}} \xrightarrow{\frac{K_S sT_5/T_6}{1+sT_6}} V_{PSS}

VPSS=clamp(VPSS,unlim,VLSMIN,VLSMAX)V_{PSS} = \text{clamp}(V_{PSS,unlim}, V_{LSMIN}, V_{LSMAX})

Input selection (speedinput): 1 = rotor speed deviation, 3 = electrical power, 4 = computed accelerating power (2Hdω/dt2H \, d\omega/dt).

IEEEST Parameters (additional):

ParameterDescription
speedinputInput mode (1, 3, or 4)
A1A6Second-order filter coefficients
T1T6Lead-lag and washout time constants
KSOverall PSS gain
LSMIN, LSMAXOutput limits
KS4Inertia constant for accelerating power (= 2H)
TW4Derivative filter time constant

The STAB3 is a simplified PSS that takes electrical power PeP_e as input, applies two sequential first-order filters and a washout-type derivative block, producing a stabilizing signal.

Pe1/(1+sTt)stab11/(1+sTX1)stab2KXs/(1+sTX2)stab3P_e \xrightarrow{1/(1+sT_t)} stab_1 \xrightarrow{1/(1+sT_{X1})} stab_2 \xrightarrow{-K_X s/(1+sT_{X2})} stab_3

VPSS=clamp(stab3,VLIM,VLIM)V_{PSS} = \text{clamp}(stab_3, -V_{LIM}, V_{LIM})

STAB3 Parameters:

ParameterDescription
TtInput measurement time constant
TX1First filter time constant
KXStabilizer gain
TX2Washout time constant
VLIMOutput limit

Over-Excitation Limiters (OEL) prevent sustained field current overloads that would thermally damage the field winding. They generate a signal VOELV_{OEL} that reduces the AVR output when field current exceeds thermal limits.

The OELHQ OEL is a sophisticated limiter developed by Hydro-Québec. It uses a piece-wise linear timer (11 operating points) to model the thermal capability curve, combined with a hysteresis latch and a full PID controller.

Timer phase: The measured field current Ifd,mesI_{fd,mes} (filtered with time constant TmT_m) drives a timer11 block with 11 (Ifd,Tlimit)(I_{fd}, T_{limit}) pairs defining the permitted over-current duration. When the accumulated timer exceeds 1.0, the hyst block locks the reference to IFDPLI_{FDPL} for the remainder of the simulation.

PID phase: Once the timer triggers, the error signal drives a PID controller:

eIFD=Ifd,refIfd,mese_{IFD} = I_{fd,ref} - I_{fd,mes}

VOEL,der(s)=eIFDsKDoel/TDoel1+sTDoelV_{OEL,der}(s) = e_{IFD} \cdot \frac{sK_{Doel}/T_{Doel}}{1 + sT_{Doel}}

VOEL,PI(s)=KPoeleIFD+KIoelseIFD,0VOEL,PIVOELMAXV_{OEL,PI}(s) = K_{Poel} \cdot e_{IFD} + \frac{K_{Ioel}}{s} \cdot e_{IFD}, \quad 0 \le V_{OEL,PI} \le V_{OELMAX}

VOEL=clamp(VOEL,der+VOEL,PI,VOELMIN,VOELMAX)V_{OEL} = \text{clamp}(V_{OEL,der} + V_{OEL,PI},\, V_{OELMIN},\, V_{OELMAX})

VOELV_{OEL} is applied at the AVR LV gate (min2v) or at the reference summation point, reducing the effective reference voltage.

OELHQ Parameters:

ParameterDescription
TmField current measurement filter time constant
IFDTHHysteresis upper threshold (= IFDDESI_{FDDES} at steady state)
IFDPLHysteresis lower threshold (permanent limit, e.g. 1.0 pu)
KIoelOEL integral gain
KPoelOEL proportional gain
KDoelOEL derivative gain
TDoelOEL derivative filter time constant
VOELMAXMaximum OEL output (= 0 pu in LV gate convention)
VOELMINMinimum OEL output (negative, e.g. −0.95 pu)
IFD1IFD11Thermal curve current points
TIFD1TIFD11Thermal curve time limit points

MAXEX2 — Field Current Limiter with Timer and Hysteresis

Section titled “MAXEX2 — Field Current Limiter with Timer and Hysteresis”

The MAXEX2 is a field current limiter derived from IEEE work, using a simplified three-point piece-wise linear timer instead of the full thermal curve of OELHQ. It is designed for the EXST1/ST1A topology where the OEL output is injected at the reference summation point (not the LV gate).

Timer phase: The measured current Ifd,mesI_{fd,mes} (selected as either field current or EfdE_{fd} via parameter IC) drives a timer3 block with three (Ifd,T)(I_{fd}, T) operating points. The hyst block latches when timer ≥ 1.

Integral phase: Once latched, the error drives a limited integrator:

eIFD=Ifd,refIfd,mese_{IFD} = I_{fd,ref} - I_{fd,mes}

V˙OEL=eIFDKMX,VLOWVOEL0\dot{V}_{OEL} = \frac{e_{IFD}}{K_{MX}}, \quad V_{LOW} \le V_{OEL} \le 0

VOELV_{OEL} is subtracted from the reference (VREFVOELV_{REF} - V_{OEL}, i.e. negative reduces reference).

MAXEX2 Parameters:

ParameterDescription
ICInput selection: 0 = EfdE_{fd}, 1 = IfdI_{fd}
IFDratedRated field current (reference)
IFD1, TIME1Timer point 1 (current level, allowable duration)
IFD2, TIME2Timer point 2
IFD3, TIME3Timer point 3
IFDDESDesired steady-state field current after limiting
KMXIntegrator time constant inverse (1/KMX = integration rate)
VLOWLower limit of OEL output (e.g. −1.0 pu)

The simple integral OEL used in AC8B_lim, ST1A_lim, SEXS_STAB3_lim, and ENTSOE_lim variants computes the over-excitation signal through a clamped integrator acting on the difference between measured field current and 1.05IFDN1.05 \cdot I_{FDN}, with an input clamp at 0.35IFDN0.35 \cdot I_{FDN}.

ΔIfd,1=Ifd1.05IFDN\Delta I_{fd,1} = I_{fd} - 1.05 \cdot I_{FDN}

ΔIfd,2=min(ΔIfd,1,0.35IFDN)\Delta I_{fd,2} = \min(\Delta I_{fd,1},\, 0.35 \cdot I_{FDN})

x˙OEL=ΔIfd,2TOEL,LOELxOELUOEL\dot{x}_{OEL} = \frac{\Delta I_{fd,2}}{T_{OEL}}, \quad L_{OEL} \le x_{OEL} \le U_{OEL}

VOEL=clamp(KOELxOEL,OELLI,0)V_{OEL} = \text{clamp}(K_{OEL} \cdot x_{OEL},\, OEL_{LI},\, 0)

A stator current limiter (SCL) with analogous structure acts on Ist=P2+Q2/VtI_{st} = \sqrt{P^2 + Q^2}/V_t relative to 1.025IGN1.025 \cdot I_{GN}.

Integral OEL Parameters (in _lim variants):

ParameterDescription
IFDNNominal field current (OEL trigger at 1.05×)
TOELOEL integrator time constant
LOELOEL integrator lower limit
UOELOEL integrator upper limit
KOELOEL output gain
OELLIOEL output lower limit
IGNNominal stator current (SCL trigger at 1.025×)
TSCLSCL integrator time constant
LSCLSCL integrator lower limit
USCLSCL integrator upper limit
KSCLSCL output gain
SCLLISCL output lower limit

For full documentation of the CODEGEN DSL primitives used in these models (tf1p, tf1p1z, tf1plim, inlim, pictl, etc.), see the CODEGEN Blocks Library.